Original Research
Low-Power Edge Inference Using Ovonic Memristors for Sports Motion Recognition and Injury-Risk Early Warning
Yanxiao Zhang
1
JuanJuan Wang
2
Sheng Dong
3

1 Physical Education Institute, Luoyang Normal University, Luoyang, 471000, China;

2 Physical Education Institute, Zhengzhou University of Science and Technology, Zhengzhou 450064, China;

3 Physical Education Institute, Henan University of Science and Technology, Luoyang 471000, China.

* Correspondence: wj612511@126.com


Journal of Ovonic Research 2026, 22(2),178-195; https://doi.org/10.67229/JOR16620
Submitted:Feb 15, 2025
Accepted:Apr 08, 2026
Published:Aug 17, 2026
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Cite This Article
Yanxiao Zhang ,JuanJuan Wang ,Sheng Dong . (2026). Journal of Ovonic Research. Low-Power Edge Inference Using Ovonic Memristors for Sports Motion Recognition and Injury-Risk Early Warning, 22(2), ,178-195. https://doi.org/10.67229/JOR16620
Abstract

The deployment of sophisticated deep learning models on battery-operated wearable devices is severely restricted by the von Neumann bottleneck and power constraints inherent in traditional CMOS architectures. This study introduces a neuromorphic hardware accelerator based on Ovonic Threshold Switching (OTS) memristors to enable ultra-low-power edge computing for athletic monitoring. We systematically investigated the impact of doping on Ge₂Sb₂Te₅ (GST) chalcogenides, revealing that carbon doping (C-GST) effectively refines the grain size to approximately 12 nm and stabilizes the amorphous phase. Consequently, the fabricated C-GST devices demonstrate superior reliability, characterized by an endurance exceeding 10⁹ switching cycles, a 10-year data retention at 85 °C, and a robust resistance window greater than 100. By mapping these experimentally characterized devices into a 256×256 crossbar-based hardware model, we evaluated a quantized hybrid CNN-LSTM network for real-time sports motion classification with downstream injury-risk warning. The system achieves a recognition accuracy of 96.2% across eight distinct movement patterns, closely approaching the performance of 32-bit floating-point software baselines. Critically, the in-memory computing architecture reduces inference latency to just 0.41 ms and operates with a total system power of 5.8 mW. This translates to an energy consumption of 2.38 µJ per inference, representing a massive efficiency gain compared to conventional edge GPU solutions. These findings establish C-doped chalcogenide memristors as a viable, high-performance platform for next-generation intelligent wearable electronics.

©2026 by the authors. Submitted for possible open access publication under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).
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